Peh Group at MIT demos SCORPIO 36 core multi processor architecture @ ISCA

Researchers unveil experimental 36-core chip | MIT News Office
MIT creates 36-core processor powered by a mini internet - Neowin

The more cores — or processing units — a computer chip has, the bigger the problem of communication between cores becomes. For years, Li-Shiuan Peh, the Singapore Research Professor of Electrical Engineering and Computer Science at MIT, has argued that the massively multicore chips of the future will need to resemble little Internets, where each core has an associated router, and data travels between cores in packets of fixed size.

This week, at the International Symposium on Computer Architecture, Peh’s group unveiled a 36-core chip that features just such a“network-on-chip.” In addition to implementing many of the group’s earlier ideas, it also solves one of the problems that has bedeviled previous attempts to design networks-on-chip: maintaining cache coherence, or ensuring that cores’ locally stored copies of globally accessible data remain up to date.

SCORPIO: A 36-Core Research Chip Demonstrating ...  Snoopy Coherence on a Scalable Mesh NoC with In-Network Ordering

Bhavya K. Daya, Chia-Hsin Owen Chen, Suvinay Subramanian, Woo-Cheol Kwon,
Sunghyun Park, Tushar Krishna, Jim Holt, Anantha P. Chandrakasan,
Li-Shiuan Peh (Massachusetts Institute of Technology)

http://projects.csail.mit.edu/wiki/pub/LSPgroup/PublicationList/scorpio_isca2014.pdf 

"Full-system 36 and 64-core simulations on SPLASH-2 and PARSECbenchmarks show  an average application run-time reduction of 24.1% and 12.9%, in comparison to  distributed directory and AMD HyperTransport coherence protocols, respectively."

Ordered Mesh Network Interconnect - DSpace@MIT

by S Subramanian - ‎2013 - ‎Related articles

a scalable coherence mechanism is imperative for these systems. ... totype developed at MIT - a 36-core chip multi-processor supporting snoopy coherence, ... teacher, be it discussing concepts, reviewing code or bouncing-off research ideas. ..... network for the SCORPIO chip - referred to as OMNI (Ordered Mesh Network ...

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ISCA Review #3: SCORPIO: A 36-Core Research Chip Demonstrating Snoopy Coherence on a Scalable Mesh NoC with In-Network Ordering | High-Performance Computing (HPC) Guy