Sunday, May 25, 2014

X-band dual channel AESA Radar TR module

X-band dual channel transmit/receive module using heterojunction multilayer substrate - Jang - 2014 - Microwave and Optical Technology Letters - Wiley Online Library


X-band dual channel transmit/receive module using heterojunction multilayer substrate
by Sung-Hoon Jang, Byung-Chang Nam, Jong-Phil Kim, and Seon-Joo Kim 
via Microwave and Optical Technology Letters

ABSTRACT

This article presents a
X-band dual channel transmit/receive (T/R) Module for AESA radar applications. Instead of the conventional low temperature cofired ceramic technology, we suggested the heterojunction (Ceramic + FR4) multilayer substrate. This structure makes a simple T/R Module fabrication process with low cost. Dual channel allows reducing the size and weight of the T/R Module. The Substrates have RF cavities to attach each MMIC chip. The RF cavity has a subcover to seal the MMIC and to give an additional area for charging capacitors. The T/R Module's performance parameters include:
  • output power is 10 W, 
  • efficiency 23%, and 
  • noise figure is under 3 dB. 
© 2014 Wiley Periodicals, Inc. Microwave Opt Technol Lett 56:1850–1854, 2014

Evolution of AESA Radar Technology | 2012-08-15 | Microwave Journal
Explores the history of AESA radars and how continuing advances in MMIC materials and fabrication technologies, advancing packaging technology and exponential growth in digital circuits opens many possibilities for the future

In assessing futures for AESA technology, advanced RF device materials and processes will comprise one part of the equation and exponentially growing density in photolithographically fabricated digital components is the other part. Brookner has recently identified the following benchmarks and trends in device and materials technology:32
  • Arrays using micro-electromechanical systems (MEMS) phase shifters
  • Low cost 24 GHz phased-array car radars driving down T/R module costs through volume
  • Extreme MMIC circuitry for 8 to 32 element arrays on single SiGe/BiCMOS chips
  • GaN technology offering tenfold higher power and higher efficiency, permitting >1000 W peak power with single transistor packages
  • Low cost Silicon based SiGe single chip
  • Purdue University low-cost S-Band two panel GaN Digital Array Radar having 700 MHz bandwidth, 25 W per element peak; gets wide angle scan through use of electromagnetic band gap (EBG) material for increased isolation between antenna elements (lower mutual coupling); has potential of eliminating circulator
  • Arrays with instantaneous bandwidths of 10:1 up to 33:1
  • 20 dB increased receiver dynamic range through improved A/D linearity and reduced intermodulation
  • Exploitation of meta-materials in passive antenna components
  • 3D micromachining technology for interconnections
Exponential density growth is a well documented feature of the digital landscape, but is less prominent in RF components, due to the encumbrances of impedance matching and need for analogue components.33 Growth, especially in parallel processing computer hardware, will impact radar across all categories, by providing abundant capability to perform floating point arithmetic. Current General Purpose Graphics Processing Unit (GPGPU) chips have internal memory bandwidths in excess of 100 Gigabytes/sec and often in excess of 500 pipelined floating point optimized processing cores in a single chip. Density growth in this technology will yield larger numbers of cores and higher memory bandwidths, enabling signal and data processing algorithms which are currently computationally infeasible in realtime applications.
In conclusion, continuing advances in MMIC materials and fabrication technologies, advancing packaging technology and exponential growth in digital circuits open many possibilities for future AESA designs.
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Carlo Kopp is an academic at Monash University in Australia and also a co-founder of the independent Air Power Australia military think tank. Kopp completed his PhD at Monash University in 2000, his dissertation dealing with the adaptation of AESAs for Gigabit datalinking and networking. Prior to his academic career, he spent 15 years in industry, mostly as a design engineer, with design experience in ECL logic, high speed analog circuits, optical receivers, high speed logic, SPARC processor boards, graphics adaptors, cooling systems, embedded software and operating systems. Kopp has also actively published as a defence analyst since 1980, with over 650 publications in related areas, including a contribution to the third edition of Skolnik’s Radar Handbook.
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